This invention relates generally to transponders and deals more particularly with improved decoder/encoder circuitry in an air traffic control transponder.
ATC transponders are installed in aircraft to receive interrogation signals which are transmitted by a ground station. The transponder decodes and validates the interrogation signal and transmits to the ground station a coded reply in the form of a pulse train containing identification of the aircraft and additional information such as altitude and the like.
Typically, the decoding and verification of the interrogation signal is performed by a shift register which is driven by a series of oscillator produced clock pulses. The incoming interrogation signal is a pulse train in which one pulse is shifted down from stage to stage by the shift register in order to adjust its timing for comparison with a subsequent pulse. The validity of the interrogation is verified in this fashion. Conventional ATC transponders further require an encoder clock for encoding the reply signal that is to be transmitted to the ground station. This has necessitated the use of two separate oscillators since each series of clock pulses (decode and encode) are of different frequency. The encoder clock is a 689.655 Khz clock because present specifications require a 1.45 microsecond time delay between pulses in the reply signal that is transmitted to the ground station. The frequency of the decoder clock is selected according to the desired size of the shift register and the width of the detection windows that are included in the decoder function.
Since the existing ATC transponders of this type require two separate oscillators, which are usually cyrstal controlled, the circuitry is rather complicated and tends to be overly expensive. The circuit cost and complexity are further increased because a timing circuit is required in order to properly time the operation of the two separate clocks. In addition, the clocks typically operate at relatively low frequency which involves restrictive specifications if adequate frequency stability is to be maintained. Another problem has been the excessive jitter associated with existing transponders and their unreliability, especially after prolonged use.
It is the primary object of the present invention to provide an ATC transponder which is improved in its operational and efficiency characteristics are compared to existing transponders.
Another important object of the invention is to provide, in conjunction with the operation of an ATC transponder, an economical and efficient method of performing the decoding and encoding functions. It is a particularly significant feature of the invention in this regard that the clock pulses from a single oscillator are utilized for both the decoding and encoding.
Yet another object of the invention is to provide an ATC transponder in which the circuitry is reduced in cost and complexity as compared to that of prior art transponders.
A further object of the invention is to provide a transponder of the character described in which the circuitry is particularly adapted for an LSI (Large Scale Integration) chip. Again, the use of a single oscillator is significant in that it lends itself to incorporation in an LSI chip better than existing circuits which require two oscillators.
An additional object of the invention is to provide a transponder of the character described which is able to maintain transmitter jitter at a relatively low level and which operates with improved reliability.
A still further object of the invention is to provide a transponder of the character described that requires only a single clock for both decoding and encoding, with the clock operating at a relatively high frequency for greater stability.
Other and further objects of the invention, together with the features of novelty appurtenant thereto, will appear in the course of the following description.